Bit error detection plays an important role in receiver margin test solutions. In a receiver margin test solution, a high speed serial generator, such as Arbitrary Waveform Generators and the like, generates a high speed serial signal as an input to a Device Under Test (DUT). A test and measurement instrument, such as an oscilloscope or the like, having error detection can monitor the output of the DUT through a loop back mode, normally in a retimed loopback mode to detect any error from the receiver of the DUT. The input to the DUT is stressed by impairing the input signal of the DUT with jitter and a spread spectrum clock. (SSC)